The integration of photonics and superconducting electronics is emerging as a central challenge for quantum photonic and low-power computing platforms. The sensitivity of superconducting electronic components to fabrication defects has been a limiting factor in achieving high yield in integrated systems of superconductors and complementary metal-oxide semiconductor (CMOS) compatible components.
Monolithic integration schemes for superconducting detectors with photonic circuits generally involve forming the detector structures before forming the rest of the photonic circuit. However, the superconducting detector structures are delicate and can be damaged by subsequent processing. Thus, fabrication methods that involve performing further processing steps after the superconducting structures have been formed can result in low yield of properly formed and operational superconducting structures.
As an additional challenge, performing the detector fabrication can introduce new (superconducting) materials into a fabrication facility, particularly for a CMOS fabrication facility. Introduction of the new materials makes it more difficult for the fabrication facility to comply with contamination standards. In addition, the additional fabrication steps can interrupt standard CMOS fabrication flows and reduce production efficiency.